Welcome to Process Evolution, Ltd., a software development and engineering consulting company. We specialize in process modeling and simulation, particularly in the microelectronic industry for BEOL and advanced interconnect processing and integration issues.

We currently develop and maintain two pieces of engineering software. The first, EVOLVE is a "2D/3D" feature-scale process simulation package with a long history of industrial use and published results for deposition, etch, and reflow processes. The second is PLENTE, a 3D microstructure formation and evolution modeling package this is still in the alpha stage of development, but quickly becoming useful for investigating such things as copper grain structures in IC metallization.

We have used both PLENTE and EVOLVE together to do fully 3D/3D topography simulation, and continue to look for partners with which to further develop this advanced software solution.

We also perform thermal and mechanical simulations of interconnect systems, with a particular focus on studying the stability of inter-wafer vias that connect circuits on two different wafers in three dimensional integrated circuits (3D-ICs). We have developed both traditional continuum and unique grain-focused models for this purpose. For grain-focused models, PLENTE is used to represent the grain structure in the inter-wafer vias and thermal/mechanical software is used to simulate the effects of temperature change on stresses in the system. We have also used this combination of software as as testbed to generate DoE-based compact models of the stresses in 3D-ICs.

We at Process Evolution, Ltd. are committed to furthering the engineering science of advanced process simulation and modeling and welcome new opportunities to develop solutions to your problems. Please contact us with your needs today.

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Recent Results

3D grain boundary evolution
(pictures of grains evolving under stress)
3D grain boundary motion driven by the relief of strain energy. White dotted lines in the bottom frame indicate the positions of grain boundaries before processing. (The encasing dielectric is not shown.)
For more info . . .

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